The present invention relates to a semiconductor device. More particularly, the invention relates to a semiconductor device that includes a data strobe signal receiving circuit.
In the related art, there have been known techniques which, upon readout from a DRAM, prevent the high-impedance (intermediate level) state of a data strobe signal output from the DRAM from being brought in.
For example, Japanese Unexamined Patent Publication No. 2008-103013 describes a data strobe receiver in which a memory read control circuit inputs a read request signal related to the reading of data from a memory and a burst length information signal related to a read request. When the read request signal becomes active, the memory read control circuit controls a pull-up circuit to pull up a data strobe signal DQS. Upon detecting the transition of the data strobe signal DQS from the High level to the Low level, the memory read control circuit sets a mask signal to an unmasking state. The memory read control circuit sets the mask signal to a masking state upon determining that the data strobe signal has repeated predetermined transitions on the basis of the burst length information signal. Subsequent to the repeated transitions, a postamble of the data strobe signal DQS is started. At the end of a postamble period, the memory read control circuit pulls up the data strobe signal DQS to the High level.